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Item Details
Title: DOMAIN-SPECIFIC PROCESSORS
SYSTEMS, ARCHITECTURES, MODELING, AND SIMULATION
By: Shuvra S. Bhattacharyya (Editor), Ed F. Deprettere (Editor), Jurgen Teich (Editor)
Format: Electronic book text

List price: £75.59


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ISBN 10: 0203913183
ISBN 13: 9780203913185
Publisher: TAYLOR & FRANCIS INC
Pub. date: 1 November, 2003
Series: Signal Processing and Communications
Pages: 280
Synopsis: Ranging from low-level application and architecture optimizations to high-level modeling and exploration concerns, this authoritative reference compiles essential research on various levels of abstraction appearing in embedded systems and software design. It promotes platform-based design for improved system implementation and modeling and enhanced performance and cost analyses. Domain-Specific Processors relies upon notions of concurrency and parallelism to satisfy performance and cost constraints resulting from increasingly complex applications and architectures and addresses concepts in specification, simulation, and verification in embedded systems and software design.
Publication: US
Imprint: CRC Press Inc
Returns: Non-returnable
Some other items by this author:
DESIGN OF IMAGE PROCESSING EMBEDDED SYSTEMS USING MULTIDIMENSIONAL DATA FLOW (HB)
DESIGN OF IMAGE PROCESSING EMBEDDED SYSTEMS USING MULTIDIMENSIONAL DATA FLOW (PB)
DIGITALE HARDWARE/SOFTWARE-SYSTEME
DOMAIN-SPECIFIC PROCESSORS
DOMAIN-SPECIFIC PROCESSORS
DOMAIN-SPECIFIC PROCESSORS
DOMAIN-SPECIFIC PROCESSORS
DOMAIN-SPECIFIC PROCESSORS
DOMAIN-SPECIFIC PROCESSORS (HB)
DYNAMICALLY RECONFIGURABLE SYSTEMS (HB)
EMBEDDED COMPUTER VISION (PB)
EMBEDDED MULTIPROCESSORS
EMBEDDED MULTIPROCESSORS
EMBEDDED MULTIPROCESSORS (HB)
EMBEDDED PROCESSOR DESIGN CHALLENGES (PB)
HANDBOOK OF HARDWARE/SOFTWARE CODESIGN
HANDBOOK OF HARDWARE/SOFTWARE CODESIGN (HB)
HANDBOOK OF SIGNAL PROCESSING SYSTEMS (HB)
HANDBOOK OF SIGNAL PROCESSING SYSTEMS (HB)
HANDBOOK OF SIGNAL PROCESSING SYSTEMS (PB)
INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS,ARCHITECTURES AND PROCESSORS (ASAP 2003) (PB)
INVASIVE COMPUTING FOR MAPPING PARALLEL PROGRAMS TO MANY-CORE ARCHITECTURES (HB)
INVASIVE COMPUTING FOR MAPPING PARALLEL PROGRAMS TO MANY-CORE ARCHITECTURES (PB)
MEMORY MANAGEMENT FOR SYNTHESIS OF DSP SOFTWARE
MEMORY MANAGEMENT FOR SYNTHESIS OF DSP SOFTWARE (HB)
MODELING AND SIMULATION OF INVASIVE APPLICATIONS AND ARCHITECTURES
MODELING AND SIMULATION OF INVASIVE APPLICATIONS AND ARCHITECTURES (HB)
PROJECT HEAD START
SOFTWARE SYNTHESIS FROM DATAFLOW GRAPHS (HB)
SOFTWARE SYNTHESIS FROM DATAFLOW GRAPHS (PB)
SYMBOLIC PARALLELIZATION OF NESTED LOOP PROGRAMS
SYMBOLIC PARALLELIZATION OF NESTED LOOP PROGRAMS (HB)

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