SYSTEMVERILOG FOR DESIGN by Stuart Sutherland, Simon Davidmann, Peter Flake ( 9781402075308 )

Item Details

Title:

SYSTEMVERILOG FOR DESIGN
A GUIDE TO USING SYSTEMVERILOG FOR HARDWARE DESIGN AND MODELING

By:

Stuart Sutherland, Simon Davidmann, Peter Flake

Format:

Hardback

List price:	£81.00
We currently do not stock this item, please contact the publisher directly for further information.

ISBN 10:

1402075308

ISBN 13:

9781402075308

Publisher:

SPRINGER-VERLAG NEW YORK INC.

Pub. date:

30 June, 2003

Pages:

402

Description:

SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). This book addresses the first aspect of the SystemVerilog extensions to Verilog. It presents important modeling features such as two-state data types, enumerated types, user-defined types, structures, unions, and interfaces.

Synopsis:

SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL based design. First, modeling very large designs with concise, accurate, and intuitive code. Second, writing high-level test programs to efficiently and effectively verify these large designs. This book, "SystemVerilog for Design", addresses the first aspect of the SystemVerilog extensions to Verilog. Important modeling features are presented, such as two-state data types, enumerated types, user-defined types, structures, unions, and interfaces. Emphasis is placed on the proper usage of these enhancements for simulation and synthesis. A companion to this book, "SystemVerilog for Verification", covers the second aspect of SystemVerilog.

Illustrations:

Illustrations

Publication:

Imprint:

Springer-Verlag New York Inc.

Returns:

Non-returnable

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