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Item Details
Title:
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VERILOG CODING FOR LOGIC SYNTHESIS
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By: |
Lee |
Format: |
Other digital |
List price:
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£45.50 |
We currently do not stock this item, please contact the publisher directly for
further information.
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ISBN 10: |
0471457566 |
ISBN 13: |
9780471457565 |
Publisher: |
JOHN WILEY & SONS INC |
Pub. date: |
9 July, 2004 |
Description: |
Verilog is a Hardware Description Language (HDL), used to design and document electronic systems. This book provides a practical approach to Verilog design and problem solving. It includes design examples that include specification, architectural definition and micro-architectural definition. It is useful as a textbook in EE departments. |
Synopsis: |
This book provides a practical approach to Verilog design and problem solving. The bulk of the book deals with practical design problems that design engineers solve on a daily basis. It includes over 90 design examples. There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification. The book is suitable for use as a textbook in EE departments that have VLSI courses. |
Publication: |
US |
Imprint: |
John Wiley & Sons Inc |
Returns: |
Non-returnable |
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Ramadan and Eid al-Fitr
A celebratory, inclusive and educational exploration of Ramadan and Eid al-Fitr for both children that celebrate and children who want to understand and appreciate their peers who do.
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