LOGIC SYNTHESIS AND VERIFICATION ALGORITHMS by Gary D. Hachtel, Fabio Somenzi ( 9780387310046 )

Item Details

Title:

LOGIC SYNTHESIS AND VERIFICATION ALGORITHMS

By:

Format:

Paperback

List price:	£60.99
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ISBN 10:

0387310045

ISBN 13:

9780387310046

Publisher:

SPRINGER-VERLAG NEW YORK INC.

Pub. date:

10 February, 2006

Pages:

564

Description:

This book blends mathematical foundations and algorithmic developments with circuit design issues. Each new technique is presented in the context of its application to design. This publication serves as a textbook for upper-division and first year graduate students in electrical and computer engineering courses.

Synopsis:

This book blends mathematical foundations and algorithmic developments with circuit design issues. Each new technique is presented in the context of its application to design. Through the study of optimal two-level and multilevel combinational circuit design, the reader is introduced to basic concepts, such as Boolean algebras, local search, and algebraic factorization. Similarly, through the study of optimal sequential circuit design, the reader is introduced to graph algorithms, finite state systems, and language theory. Throughout the book, recurrent themes such as branch and bound, dynamic programming, and symbolic implicit enumeration are used to establish optimal design principles.

Illustrations:

XXXII, 564 p.

Publication:

Imprint:

Springer-Verlag New York Inc.

Returns:

Returnable

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