LOGIC SYNTHESIS AND VERIFICATION ALGORITHMS by Gary D. Hachtel, Fabio Somenzi ( 9780792397465 )

Item Details

Title:

LOGIC SYNTHESIS AND VERIFICATION ALGORITHMS

By:

Format:

Hardback

List price:	£79.99
We currently do not stock this item, please contact the publisher directly for further information.

ISBN 10:

0792397460

ISBN 13:

9780792397465

Publisher:

SPRINGER

Pub. date:

30 June, 1996

Edition:

1996 ed.

Pages:

564

Description:

This textbook is about the theoretical underpinnings of VLSI (Very Large Scale Integrated Circuits), combining and integrating modern developments in logic synthesis and formal verification with the more traditional matter of Switching and Finite Automata Theory.

Synopsis:

Logic Synthesis and Verification Algorithms is a textbook designed for courses on VLSI Logic Synthesis and Verification, Design Automation, CAD and advanced level discrete mathematics. It also serves as a basic reference work in design automation for both professionals and students. Logic Synthesis and Verification Algorithms is about the theoretical underpinnings of VLSI (Very Large Scale Integrated Circuits). It combines and integrates modern developments in logic synthesis and formal verification with the more traditional matter of Switching and Finite Automata Theory. The book also provides background material on Boolean algebra and discrete mathematics. A unique feature of this text is the large collection of solved problems. Throughout the text the algorithms covered are the subject of one or more problems based on the use of available synthesis programs.

Illustrations:

XXXII, 564 p.

Publication:

Netherlands

Imprint:

Springer

Returns:

Returnable

Some other items by this author:

ABSTRACTION REFINEMENT FOR LARGE SCALE MODEL CHECKING (HB)

ABSTRACTION REFINEMENT FOR LARGE SCALE MODEL CHECKING (PB)

COMPUTER AIDED VERIFICATION 15 (PB)