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Item Details
Title: TIMING
By: Sachin S. Sapatnekar
Format: Paperback

List price: £139.99


We currently do not stock this item, please contact the publisher directly for further information.

ISBN 10: 1441954082
ISBN 13: 9781441954084
Publisher: SPRINGER-VERLAG NEW YORK INC.
Pub. date: 7 December, 2010
Edition: Softcover reprint of the original 1st ed. 2004
Pages: 294
Synopsis: Statistical timing analysis is an area of growing importance in nanometer te- nologies' as the uncertainties associated with process and environmental var- tions increase' and this chapter has captured some of the major efforts in this area. This remains a very active field of research' and there is likely to be a great deal of new research to be found in conferences and journals after this book is published. In addition to the statistical analysis of combinational circuits' a good deal of work has been carried out in analyzing the effect of variations on clock skew. Although we will not treat this subject in this book' the reader is referred to [LNPS00' HN01' JH01' ABZ03a] for details. 7 TIMING ANALYSIS FOR SEQUENTIAL CIRCUITS 7.1 INTRODUCTION A general sequential circuit is a network of computational nodes (gates) and memory elements (registers). The computational nodes may be conceptualized as being clustered together in an acyclic network of gates that forms a c- binational logic circuit. A cyclic path in the direction of signal propagation 1 is permitted in the sequential circuit only if it contains at least one register .In general, it is possible to represent any sequential circuit in terms of the schematic shown in Figure 7.1, which has I inputs, O outputs and M registers. The registers outputs feed into the combinational logic which, in turn, feeds the register inputs. Thus, the combinational logic has I + M inputs and O + M outputs.
Illustrations: biography
Publication: US
Imprint: Springer-Verlag New York Inc.
Returns: Returnable
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